Staff RTL Design Engineer
Core
Designing high-performance, energy-efficient interconnects for mobile, automotive, networking, and enterprise markets.
Role type
Staff Interconnect RTL Design Engineer
Builds
High-performance interconnect products for mobile, automotive, networking, and enterprise markets
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
System Verilog RTL design, Design synthesis, Lint/CDC/RDC, SVA, Formal verification tools, Synthesis/STA, Power-aware design methodologies
Preferred skills
Interconnect and bus architecture, AMBA protocols, Low-power design (UPF/CPF)
Responsibilities
Define micro-architecture for interconnect units, develop Verilog RTL logic, analyze synthesis/timing reports to meet PPA targets, collaborate on test plan development, analyze power results
Seniority
Senior, hands-on IC