Senior Physical Design Engineer
Core
Design high-speed communication chips (Networking Silicon) focusing on power, area, and performance optimization.
Role type
Senior IC physical design engineer
Builds
High-throughput, low-latency networking chips
Domain
Semiconductor / Networking
Required skills
RTL2GDS flow, synthesis, place and route, timing closure, power and noise analysis, physical verification (LVS/DRC), PNR, STA
Preferred skills
EDA tools (Synopsys, Cadence)
Responsibilities
Physical design of blocks under challenging constraints, resolving complex timing and congestion problems, executing full RTL2GDS development flow, participating in inflows development
Seniority
Senior, hands-on IC
