CareerPlan

Senior Mixed Signal Circuit Design Engineer

Taiwan, HsinchuFull-time2026-10-19 → 2026-11-10

Core

Design and implement high-speed mixed-signal interfaces (TX/RX/Clocking/PLL) for next-generation NVLink, taking designs from concept through silicon characterization at data rates of 50Gbps and higher.

Role type

Senior IC mixed-signal circuit design engineer

Builds

High-speed interface chips for consumer graphics and self-driving cars

Domain

Semiconductors / High-speed analog and mixed-signal design

Required skills

Deep-submicron CMOS circuit design, Analog/Mixed-signal design, Schematic design, Layout and verification, EDA tools (Cadence Virtuoso, Spectre, Hspice), Test bench creation, Behavioral modeling, Noise analysis, Loop stability analysis, Monte-Carlo simulation

Preferred skills

FINFET process experience, Post-silicon bring-up and debugging, Floorplanning, High-speed routing guidance

Technologies

Cadence Virtuoso, Spectre, Hspice, Finesim, XA

Responsibilities

Define circuit requirements and complete design from schematic, layout, and verification to characterization; Conduct schematic design of deep-submicron CMOS technologies; Take responsibility for architecture, transistor design and verification; Optimize circuit to meet system performance specifications; Work with layout engineers on floorplan and high-speed routing; Provide support for post-silicon bring-up and debugging

Seniority

Senior, hands-on IC