High Speed IO Validation Engineer
Core
Drive characterization and debug for high-speed IO interconnects (PCIe, Ethernet, USB3, UFS) across silicon, board, firmware, and driver to ensure signal integrity and link margin before product shipment.
Role type
Senior IC electrical validation engineer (high-speed SERDES)
Builds
High-speed interconnects for NVIDIA GPUs, CPUs, and SOCs used in AI, consumer graphics, and self-driving cars.
Domain
Semiconductor hardware validation, high-speed electrical engineering, signal integrity
Required skills
High-speed SERDES electrical validation, Signal Integrity (SI) and Power Integrity (PI) fundamentals, PCIe protocol validation, Lab equipment operation (DSOs, BERT, protocol analyzers), Scripting (Perl, Python), AI-assisted workflow design, Root cause analysis
Preferred skills
Experience with CoWoS/interposer/substrate characterization, AI solution building for silicon validation
Technologies
PCIe, Ethernet, USB3, UFS, DSOs, BERT, Perl, Python, AI workflows
Responsibilities
Execute electrical validation for high-speed interfaces, Engage with cross-functional teams on design and development, Analyze complex HSIO bugs using debugging techniques, Diagnose and validate interfaces using modern lab equipment, Develop test/debug programs using scripting languages, Innovate methodologies leveraging AI-assisted workflows
Seniority
Senior, hands-on IC
