Senior Post-Silicon PCIe Characterization Engineer
Core
Validate and characterize next-generation Arm SoCs, focusing on PCIe interfaces across process, voltage, temperature, and frequency conditions.
Role type
Senior IC post-silicon characterization engineer (PCIe)
Builds
System-level stress workloads and test content for Arm SoCs (via careerplan.io/jobs/100509410720-senior-post-silicon-pcie-characterization-engineer-at-arm)
Domain
Semiconductor / High-speed interface characterization
Required skills
PCIe architecture (link initialization, training, equalization, PHY), C/C++, Arm assembly, Python, voltage/frequency margining, protocol analyzers, oscilloscopes, debuggers
Preferred skills
PCIe PHY characterization, signal integrity, PCIe Gen4/5/6, Python automation, Arm-based SoCs, system-level testing
Technologies
Linux, Bare-Metal SW, Python, C/C++, Arm assembly, protocol analyzers, scopes, debuggers
Responsibilities
Develop and enable system-level stress workloads on Linux and Bare-Metal environments; Collaborate with post-silicon validation team to characterize silicon; Debug and resolve system issues and bugs; Develop test plans and implement tests for characterizing silicon
Seniority
Senior, hands-on IC
