Senior ASIC Design Verification Engineer - LPU
Core
Verify the design and implementation of NVIDIA's leading inference accelerator (ASIC) using advanced methodologies and automated flows.
Role type
Senior ASIC Design Verification Engineer
Builds
High-performance processor elements implementing programmable compute and graphics functionality
Domain
Semiconductor / ASIC Design / AI Accelerators
Deliverable
production ML models
Required skills
SystemVerilog, UVM, Random stimulus generation, Functional coverage, Assertion-based verification, Debugging, Perl/Python, C/C++
Preferred skills
UPF power verification, Netlist verification, DFT verification, Machine learning in verification flow
Technologies
VCS, Verdi
Responsibilities
Define verification scope and infrastructure, collaborate with architects and designers, implement and optimize automated verification flows, verify correctness of design and reference models
Seniority
Senior, hands-on IC
