Pre-Silicon Validation (AI/ML)
Core
Designing and building test automation, developing and running test cases, and working with modern tools and infrastructure to validate next-generation neural network hardware accelerators.
Role type
System Test Engineer (Pre-Silicon Validation)
Builds
Advanced emulation environments for Neural Accelerators
Domain
Semiconductor hardware verification / AI hardware acceleration
Deliverable
production ML models
Required skills
SystemVerilog/Verilog, emulation platforms (ZeBu, Palladium, Strato), test automation, simulation/emulation mismatch debugging, EDA tool collaboration, test planning and estimation
Preferred skills
UVM-based verification, CI platforms, Git, Python/Perl scripting, embedded device software testing, machine learning and neural networks knowledge, efficiency tuning and performance analysis
Technologies
ZeBu, Palladium, Strato, SystemVerilog, Verilog, Python, Perl, Git, UVM
Responsibilities
Designing and building test automation, developing and running test cases, troubleshooting simulation/emulation mismatches, collaborating with architecture/design/verification/software engineers to optimize emulation workflows, planning system test tasks and producing effort estimates
Seniority
Mid-level to Senior, hands-on IC
