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MLA IP Design Verification Engineer, Annapurna Labs

Cupertino, California, United States💼 Full-time💰 $157,300–$212,800🗓 2026-09-15 → 2026-09-25

Core

Design and validation of machine learning hardware in data centers to ensure hardware and software solutions achieve desired functionality.

Role type

Design Verification Engineer (ML Hardware)

Builds

Cloud-scale machine learning acceleration hardware and software solutions

Domain

Cloud computing, Machine Learning, Hardware Design

Deliverable

production ML models

Required skills

Debugging architecture and algorithms, Multi-level logic verification (IP blocks to SoCs to full system), Functional verification, Performance validation

Preferred skills

Formal verification techniques, Abstraction, End-to-end checking

Technologies

UVM, SystemVerilog, Formal verification tools

Responsibilities

Develop and execute multi-faceted verification/validation plans, Measure team progress towards customer metrics, Identify bugs in functionality and performance

Seniority

Mid-Senior, hands-on IC

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