Senior Memory Subsystem Architect
Core
Designing and optimizing memory subsystems for leading-edge SoC systems to balance performance, power, area, and complexity.
Role type
Senior IC memory subsystem architect
Builds
High-performance SoC memory solutions for data centers, autonomous vehicles, deep learning, and gaming
Domain
Semiconductor / SoC Architecture
Deliverable
production ML models
Required skills
SoC architecture, MMU and address translation, memory caching, interconnects, DRAM controllers, performance modeling, simulation, RTL debugging
Preferred skills
Performance modeling for early architecture analysis, understanding of bandwidth/latency and Quality of Service
Technologies
RTL, simulation tools, performance modeling frameworks
Responsibilities
Develop micro-architecture to optimize memory system performance and power; Model and simulate features to improve efficiency; Analyze benchmarks and workloads to identify optimization tradeoffs; Debug performance issues across models, simulation, and silicon; Collaborate with ASIC, verification, software, and product teams
Seniority
Senior, hands-on IC
