SoC PnP Architect
Core
Architecting and optimizing System-on-Chip (SoC) performance, power, and efficiency across the full lifecycle from pre-silicon modeling to post-silicon characterization.
Role type
Senior IC SoC Performance and Power (PnP) Architect
Builds
High-performance silicon platforms optimized for power efficiency and throughput
Domain
Semiconductor / Computer Architecture
Required skills
SoC architecture, performance modeling (SystemC/TLM), hardware emulation (Palladium, Veloce, ZeBu), post-silicon characterization, Linux kernel debugging, C/C++, Python
Preferred skills
Microarchitecture expertise, protocol debugging (CHI, AXI, PCIe, CXL), power management (DVFS, voltage domains), cross-functional leadership
Technologies
SystemC, TLM, Palladium, Veloce, ZeBu, Linux, perf, ftrace, C/C++, Python
Responsibilities
Drive system-level performance and power investigations; develop and calibrate architectural models for pre-silicon analysis; perform root-cause analysis of performance gaps and power inefficiencies on silicon; debug issues across hardware, firmware, OS, and driver layers; translate modeling insights into architectural recommendations; lead cross-functional investigations to optimize platform configuration.
Seniority
Senior, hands-on IC