Principal Engineer, Project Management - Chip Design
Core
Lead the full lifecycle development of NVIDIA's next-generation Switch ASICs from concept and architecture through tape-out and mass production.
Role type
Principal ASIC Project Manager (Technical)
Builds
Next-generation Switch ASICs for NVIDIA
Domain
Semiconductor / ASIC Design
Required skills
ASIC lifecycle management, cross-disciplinary team leadership, RTL design (Verilog), verification (UVM, System Verilog), SoC design/integration flow, design automation, roadmap definition, synthesis, physical design
Preferred skills
Experience in synthesis and physical design
Technologies
Verilog, UVM, System Verilog, SoC, Design Automation
Responsibilities
Lead ASIC development from concept and architecture through micro-architecture, design, verification, and physical design until tape-out; Oversee post-silicon activities including chip power-on, bring-up, quality phases, and mass production; Define and implement execution plans with cross-discipline leaders; Contribute to the definition of NVIDIA's switch ASIC roadmap.
Seniority
Principal, hands-on IC