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Senior VLSI Library Methodology Engineer

US, CA, Santa Clara💼 Full-time💰 $136,000–$136,000🗓 2026-07-28 → 2026-10-07

Core

Architect and build automation infrastructure for library analysis, quality validation, and deployment in NVIDIA's Physical Design flows for GPUs and SoCs.

Role type

Senior IC VLSI Library Methodology Engineer

Builds

Scalable automation systems, analysis pipelines, regression frameworks, and reporting dashboards for library quality and release readiness.

Domain

Semiconductor / VLSI Physical Design / Design Automation

Required skills

Python, C++, Perl, EDA tool scripting, workflow automation, data pipeline design, system architecture, scalability design, issue triage methodologies

Preferred skills

Library model consumption in chip design flows, contextual model calibration, regression health tracking, resource utilization optimization, AI/ML/LLM application to EDA workflows

Technologies

Innovus, Fusion Compiler, Crosscheck, Virtuoso

Responsibilities

Architect scalable automation systems for verifying and reporting library quality; Build end-to-end infrastructure including analysis pipelines and dashboards; Develop automated library analysis and validation flows; Collaborate with design and CAD teams to integrate quality systems; Define methodologies for issue triage and release criteria. (via careerplan.io/jobs/893396750284-senior-vlsi-library-methodology-engineer-at-nvidia)

Seniority

Senior, hands-on IC