Design Engineer, Coherent High Speed Interconnect
Core
Design and optimize high-speed coherent interconnects (NVLINK-C2C) for mobile SoCs and GPUs, enabling coherent interconnection of NVIDIA GPUs, DPUs, and CPUs via chiplets.
Role type
Senior IC design engineer (high-speed interconnects)
Builds
High-speed coherent interconnects for mobile SoCs and GPUs
Domain
Semiconductor / High-speed digital interconnects
Required skills
RTL design, performance analysis, power optimization, Verilog, System Verilog, interconnect protocols (PCIe, CXL, AXI, CHI)
Preferred skills
Mentoring junior engineers, Master's or PhD degree
Technologies
NVLINK-C2C, PCIe, CXL, AXI, CHI, Verilog, System Verilog
Responsibilities
Work on architecture and design of high-speed coherent interconnects; Collaborate with architects, external partners, software engineers, and circuit designers; Optimize design based on features, requirements, and system limitations
Seniority
Senior, hands-on IC
