ASIC Design Engineer
Core
Designing high-performance, area and power-efficient RTL for SoC and GPU products including GPUs, time distribution systems, engine schedulers, and interrupt controllers.
Role type
ASIC Design Engineer (RTL/Microarchitecture)
Builds
SoC and GPU products for consumer graphics, self-driving cars, and AI
Domain
Semiconductor / VLSI / Computer Architecture
Required skills
RTL design (Verilog), Micro-architecture, Logic synthesis, Power and timing analysis, Digital systems, VLSI design, Computer Architecture, Computer Arithmetic, Scripting (Perl/Python)
Preferred skills
C/C++, Multi-clock domains, Asynchronous logic, Interface protocols, Arbitration schemes
Technologies
Verilog, Perl, Python
Responsibilities
Drafting microarchitecture documents, implementing RTL, analyzing architectural trade-offs, collaborating with architects and verification teams, assisting in silicon bring-up and debugging
Seniority
Mid-level (2+ years experience)
