Senior Signal and Power Integrity Engineer - Hardware
Core
Designing and optimizing signal integrity (SI) and power delivery networks (PDN) for high-speed interfaces in GPU and AI systems.
Role type
Senior IC hardware engineer (signal & power integrity)
Builds
High-speed interface solutions (NVLink, PCIe, USB, DDR) for GPU and AI accelerators
Domain
Semiconductor hardware, high-speed digital design, GPU/AI infrastructure
Required skills
Signal integrity simulation, Power Delivery Network (PDN) design, 3D EM modeling, High-speed interface standards (PCIe, USB, DDR, NVLink), PDN evaluation, System-level timing/loss budgeting, Lab measurement correlation
Preferred skills
VNA/TDR/DSO usage, JMP/MATLAB automation, Circuit design, Link architecture, Debugging
Technologies
ANSYS HFSS/Q3D, ANSYS SIWAVE, JMP, MATLAB, VNA, TDR, DSO
Responsibilities
Craft creative SI solutions for complex system design problems, Perform system-level SI simulations for high-speed interfaces, Model vias/connectors/sockets in 3D EM tools, Design and optimize PDN across packages and PCBs, Improve SI/PI models through lab measurements, Automate simulation and analyze data
Seniority
Senior, hands-on IC
