Senior VLSI Integration Engineer
Hybrid
Core
Design and integrate complex System-on-Chip (SoC) networking chips, collaborating with cross-functional teams to deliver optimized silicon.
Role type
Senior IC ASIC engineer (SoC integration)
Builds
Complex networking chips
Domain
Semiconductor / VLSI / SoC design
Required skills
RTL design (System-Verilog), chip-level design, partitioning, CDC/RDC analysis, trial synthesis, design quality checks, emulation, flows development
Preferred skills
Delivery to physical design, emulation, firmware, scripting (Python, Bash, Tcl)
Technologies
System-Verilog, Python, Bash, Tcl
Responsibilities
Implement chip level design through collaboration with cross-functional teams; Resolve functional debug, physical design readiness, and design quality issues; Participate in flows development and deployment
Seniority
Senior, hands-on IC
