Process Engineer, Gold-To-Gold Interconnect & Flip Chip Assembly (Starlink/Akoustis)
Core
Develop, optimize, and qualify advanced IC assembly processes for Gold-to-Gold Interconnect and thermosonic flip-chip bonding to support RF filter production.
Role type
Senior IC assembly process engineer (advanced packaging)
Builds
RF filters using XBAW technology for Starlink and Akoustis
Domain
Semiconductor manufacturing / Advanced packaging / RF electronics
Required skills
Gold-to-Gold interconnect (GGI) process development, thermosonic flip-chip bonding, vacuum mold lamination, DOE/SPC, root-cause analysis, failure analysis (X-ray/SEM), equipment qualification, material selection for encapsulation
Preferred skills
Gold stud bumping, warpage/CTE mismatch management, plasma/surface preparation, OSAT support, simulation tools (ANSYS/COMSOL), data analysis (JMP/Minitab)
Technologies
Flip-chip bonders, thermosonic bonders, vacuum laminators, X-ray, SAM, optical microscopy, profilometry, cross-section, SEM
Responsibilities
Develop and qualify GGI and flip-chip processes; optimize vacuum mold lamination and encapsulation; run DOEs and capability studies; specify and qualify assembly equipment; perform failure analysis and root-cause analysis; support NPI from prototype to production release
Seniority
Mid-level, hands-on IC
