Design Verification Engineer
Core
Develop and maintain block-level IP verification testbenches, test methodology, and infrastructure for custom hardware accelerators supporting encryption, authentication, compression, and compute offloads.
Role type
Early-career IC design verification engineer
Builds
Custom hardware offload engines for AMD servers, datacenters, client, and embedded products
Domain
Semiconductor / Hardware Verification
Required skills
ASIC functional verification, SystemVerilog, UVM, formal verification, simulation debugging, coverage analysis, Python scripting, Linux/Windows environments
Preferred skills
Hardware verification experience (tapeout/internship), AI coding assistants, Perl/Ruby scripting, Makefiles
Technologies
SystemVerilog, UVM, Formal Verification, Python, Perl, Ruby, Linux, Windows
Responsibilities
Develop and maintain block level IP verification testbenches and infrastructure; Develop detailed test plans for new features; Triage regressions, debug simulations, and analyze coverage; Deploy industry leading verification methodologies such as UVM and formal verification; Reproduce silicon functional bugs in simulations or formal verification tools; Conduct and participate in code reviews
Seniority
Early-career, hands-on IC
