Packaging Engineer
Core
Develop and deploy AI-driven automation workflows to improve the efficiency, quality, and scalability of complex package, bridge, and interposer design for advanced heterogeneous integration technologies.
Role type
Senior IC packaging design automation engineer (AI/ML)
Builds
Automated design frameworks and AI-assisted workflows for substrates, silicon interposers, and bridge-based architectures
Domain
Semiconductor manufacturing / Advanced packaging / AI engineering
Deliverable
production ML models
Required skills
Advanced packaging design, EDA tool scripting (Python, Tcl, SKILL, C++), AI/ML methodologies, heterogeneous integration (2.5D/3D IC, Chiplets), design verification flows (DRC/LVS), signal integrity and power delivery
Preferred skills
Experience with Cadence APD/SiP, Siemens Xpedition, Synopsys 3DICC, PyTorch, TensorFlow, cross-functional collaboration
Technologies
Python, Tcl, SKILL, C++, PyTorch, TensorFlow, Cadence APD/SiP, Siemens Xpedition, Synopsys 3DICC
Responsibilities
Develop automation frameworks for package substrates and interposers; Apply AI/ML to auto-routing, placement optimization, and signal integrity; Partner with EDA teams to implement automation features; Support design milestones and tape-outs; Create reusable workflows and documentation
Seniority
Senior, hands-on IC
