Senior SoC Power Modeling Engineer
Core
Drive pre-silicon power modeling and analysis for AMD's next-generation Embedded x86 SoC platforms, defining use-case-driven power expectations and enabling EDC/TDC, voltage-frequency (VF), and PPA trade-off decisions.
Role type
Senior IC SoC Power Modeling Engineer
Builds
SoC-level power models, VF curves, and electrical constraints for Embedded x86 platforms
Domain
Semiconductor / SoC Design / Embedded Systems
Required skills
SoC power modeling, IP-level power integration, Voltage-Frequency (VF) curve derivation, EDC/TDC analysis, DVFS modeling, Python scripting, workload abstraction, pre-silicon to post-silicon correlation
Preferred skills
Embedded or Automotive SoC experience, x86 CPU/GPU power behavior knowledge, sensitivity study execution, bounding-box analysis, stakeholder communication
Technologies
Python, SoC power modeling frameworks, IP power models
Responsibilities
Develop and maintain SoC-level power models using IP inputs; Create use-case-driven models for automotive, industrial, and edge workloads; Build and validate Voltage-Frequency (VF) curves across operating corners; Integrate IP-level models into cohesive SoC frameworks; Evaluate power/performance/area trade-offs for new features; Support pre-silicon to post-silicon correlation of power models
Seniority
Senior, hands-on IC
