Principal Design Verification Engineer
Core
Own the planning, building, and execution of verification for AMD's graphics processor IP to ensure bug-free final designs.
Role type
Principal Design Verification Engineer (GPU IP)
Builds
Graphics processor IP (GPU) verification environments and methodologies
Domain
Semiconductor / Digital Design Verification
Required skills
Digital design verification strategy, SystemVerilog, UVM, directed and constrained-random testing, functional and code coverage analysis, risk identification, trade-off analysis, mentoring, C/C++/Perl/Shell/Ruby scripting, computer architecture knowledge
Preferred skills
Experience with VCS, Cadence, Mentor Graphics, simulation profile optimization, distributed compute environment automation, complex design verification (beyond I2C)
Technologies
SystemVerilog, UVM, VCS, Cadence, Mentor Graphics, C, C++, Perl, Shell, Ruby
Responsibilities
Define and drive verification strategy for complex GPU features; Partner with architects and RTL leads to influence feature definition; Own verification planning and execution for critical areas; Lead development of scalable verification environments; Solve complex verification challenges; Analyze functional and code coverage at a system level; Mentor and coach junior and senior engineers
Seniority
Principal, technical leader with strategic influence and mentorship
