CareerPlan

Process Engineer – Die to Wafer Hybrid Bonding

Santa Clara,CAFull-time$147k–$203k2026-07-27 → 2026-10-23

Core

Designing and optimizing manufacturing processes for die to wafer (D2W) hybrid bonding in 2.5D/3D advanced packaging technologies.

Role type

Senior IC process engineer (advanced packaging/hybrid bonding)

Builds

2.5D/3D advanced packaging technologies and hybrid bonding systems

Domain

Semiconductor manufacturing / Materials science

Required skills

Die to wafer or wafer to wafer hybrid bonding, Thin die handling and alignment, Micro-LED or CPO experience, Heterogeneous integration (III-V to Si, novel materials to Si), Direct process engineer experience on mainstream semiconductor equipment, Bond interface physics, Alignment and overlay fundamentals, Mechanical behavior of thin and fragile dies, Statistical analysis and process control (DOE, SPC, JMP)

Preferred skills

None stated

Technologies

None stated

Responsibilities

Develop die to wafer hybrid bonding processes including surface preparation, plasma activation, high accuracy die placement and alignment, and post bond characterization, Integrate D2W bonding with adjacent process modules such as dicing, die preparation, die thinning, inter die gap fill and planarization, Design and execute DOE driven experiments to understand process limits, sensitivities, and trade offs, Own process optimization, perform failure analysis and characterization, and drive continuous engineering improvement

Seniority

Senior, hands-on IC