Process Engineer – Die to Wafer Hybrid Bonding
Core
Develop and optimize die-to-wafer (D2W) hybrid bonding processes for silicon photonics and co-packaged optics to enable photonic–electronic co-integration for AI and HPC systems.
Role type
Senior IC process engineer (hybrid bonding R&D)
Builds
Next-generation optical interconnects and co-packaged optics modules
Domain
Semiconductor manufacturing / Silicon photonics / Advanced packaging
Required skills
Die-to-wafer or wafer-to-wafer bonding, Thin-die handling and alignment-critical processes, Direct process engineer experience on mainstream semiconductor equipment, 2.5D/3D integration, Bond interface physics, Alignment and overlay fundamentals, Mechanical behavior of thin and fragile dies, Statistical analysis and process control (DOE, SPC)
Preferred skills
None stated
Technologies
Fully integrated die-to-wafer hybrid bonding system, Plasma activation, Dicing, Die thinning, Inter-die gap fill and planarization
Responsibilities
Develop die-to-wafer hybrid bonding processes including surface preparation, plasma activation, high-accuracy die placement, and post-bond characterization; Integrate D2W bonding with adjacent modules like dicing, die thinning, and gap fill; Design and execute DOE-driven experiments to understand process limits; Own process optimization, perform failure analysis, and drive continuous engineering improvement.
Seniority
Senior, hands-on IC