Design Verification, Forward Deployed Engineering
Core
Senior Design Verification Engineer serving as a Subject Matter Expert (SME) for semiconductor deployments, focusing on verification workflows, AI-assisted test generation, and mentoring teams on verification methodology.
Role type
Senior IC Design Verification Engineer (Semiconductor)
Builds
Production-grade AI systems for chip design lifecycle, verification tooling, and evaluation harnesses
Domain
Semiconductor / Hardware Design Verification
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM, constrained-random verification, directed testing, scoreboards, checkers, monitors, stimulus generation, regression infrastructure, coverage analysis, computer architecture, RTL/microarchitecture, memory systems, coherency, interconnects, Python scripting, automation
Preferred skills
Formal verification, emulation, performance analysis, physical design, AI/LLM application to semiconductor workflows, reusable evaluation assets, customer-facing technical delivery
Technologies
VCS, Questa, Verdi
Responsibilities
Serve as design verification SME for semiconductor deployments, shape AI-assisted workflows for test generation and debug, curate evaluations with FDEs and customer SMEs, build lightweight prototypes and eval harnesses, educate and mentor the FDE team on verification concepts, partner with FDEs during customer discovery to translate pain points into solution hypotheses, support customer-facing technical conversations as a trusted advisor
Seniority
Senior, hands-on IC
