2027 Term 1 Internship – IC Design Exploration Intern
Core
Intern role focused on IC design exploration across analog, digital, functional verification, and post-silicon validation for high-speed SerDes technology.
Role type
IC Design Exploration Intern
Builds
High-speed analog and mixed-signal circuits, digital logic blocks, verification frameworks, and validation platforms for SerDes blocks.
Domain
Semiconductor / IC Design / High-Performance Computing
Required skills
Analog circuit design, Digital logic design (Verilog/VHDL), Functional verification (SystemVerilog/UVM), Post-silicon validation, EDA tool usage (Cadence, Synopsys), Scripting (Python, Perl, TCL, Shell), Circuit simulation, RTL development, Timing closure, Low-power design, Debugging silicon issues
Preferred skills
Knowledge of programming and scripting, Strong analytical and problem-solving skills
Technologies
Cadence Virtuoso, Spectre, HSPICE, Calibre, Synopsys Design Compiler, IC Compiler II, Fusion Compiler, PrimeTime, Python, Perl, Shell/Unix, SystemVerilog, UVM, C/C++, TCL, Oscilloscopes, Analyzers, BERTs, Network analyzers
Responsibilities
Support design and development of high-speed analog and mixed-signal circuits, Design and implement digital logic blocks, Verify complex digital and security IP designs, Perform bring-up and validation of high-speed SerDes designs, Participate in technical discussions and knowledge-sharing activities, Develop automation and scripting solutions to improve engineering productivity
Seniority
Intern
