CareerPlan

Design Verification Engineer Intern

Tlaquepaque, Jalisco, MexicoInternship2026-08-18 → 2026-10-20

Core

Support verification activities for advanced DRAM and emerging memory technologies by developing verification environments, creating test patterns, and analyzing failures.

Role type

Design Verification Engineer Intern

Builds

High-density memory products (DRAM, NAND, NOR)

Domain

Semiconductor / Memory / Electronics

Required skills

Digital logic design, CMOS circuits, Programming (Python, C/C++), Debugging, Analytical problem-solving

Preferred skills

Hardware description languages (Verilog, SystemVerilog), Simulation/VLSI design concepts, AI-assisted engineering tools, Automation scripting

Technologies

Python, C/C++, Verilog, SystemVerilog, DRAM technologies

Responsibilities

Support verification activities for chip-level and block-level functionality; Assist in developing and maintaining digital and analog verification environments; Create test patterns, execute regressions, and improve functional coverage; Analyze verification failures and support debugging efforts; Participate in automation and verification flow improvements

Seniority

Intern