DPU验证工程师-Data（北京）
Core
Build and maintain UVM verification environments for DPU chips, focusing on automated, reusable environments and high-quality delivery of code and functional coverage.
Role type
Senior IC verification engineer (DPU)
Builds
DPU chips
Domain
Semiconductor / Hardware Verification
Deliverable
production ML models
Required skills
UVM, System Verilog, PCIe protocol, Ethernet protocol, RoCEv2/3, VirtIO, AXI4, RTL/FW co-simulation, GLS simulation, performance verification, power-aware simulation, regression analysis
Preferred skills
System-level networking, storage, NVMe, virtualization, SR-IOV, compression algorithms
Technologies
Makefile, Perl, Python, C/C++
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