ASIC设计工程师（DPU方向）-Data
Core
Design and develop RTL for Data Processing Unit (DPU) chips, supporting migration to ASIC and integration.
Role type
Senior IC ASIC design engineer (DPU/network chip)
Builds
DPU chips, network interface cards, and switching chips
Domain
Semiconductor hardware design, data center networking
Deliverable
production ML models | product features
Required skills
Verilog, RTL development, ASIC migration, network protocol stacks, computer architecture, bus interfaces (MAC, PCIe, AMBA, DDR), scripting (TCL, Perl, Makefile, Python)
Preferred skills
Compression/decompression, encryption/decryption, storage interfaces (Virtio-blk, NVMe), performance modeling and optimization
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