RTL Design Engineer
Core
Develop and implement design verification strategies for AI chips (ASICs) optimized for specific model architectures like transformers.
Role type
RTL Design Engineer (ASIC/SoC)
Builds
Custom AI accelerators (ASICs) for real-time video generation and deep reasoning models
Domain
Semiconductor / AI Hardware / Digital Logic
Deliverable
production ML models
Required skills
RTL development, high-speed digital logic, RTL design and synthesis tools, verification and test bench writing, floating point math operator implementation
Preferred skills
PCIe/Ethernet/HBM technologies, transformer models, numerical representations, Python scripting
Technologies
RTL design and synthesis tools, Python
Responsibilities
Develop design verification strategies for existing and upcoming ASIC designs, implement blocks for efficient floating point math computation, provide feedback to uArch team on timing and area constraints
Seniority
Mid-Senior, hands-on IC
