CareerPlan

半導体組立工程 技術開発エンジニア

Nakatsu, jpFull-time2026-11-05 → 2026-11-10

Core

Develop assembly and packaging technologies for advanced semiconductor packages (Flip Chip, SiP, VPS, FCCSP, FCBGA) serving AI, HPC, automotive, and IoT markets.

Role type

Senior IC semiconductor assembly and packaging technology engineer

Builds

High-density, high-reliability, and high-thermal-conductivity semiconductor packages for next-gen AI/HPC and automotive chips

Domain

Semiconductor manufacturing / Advanced packaging / Electronics

Required skills

Semiconductor back-end assembly/packaging development, SMT/SPI/AOI/Flip Chip bonding/Flux cleaning process development, Process improvement, Quality management, Equipment selection and implementation, Technical degree (Mechanical/Materials/Electronics/Chemical)

Preferred skills

Failure analysis using FTA/5Why, Material selection and optimization, CAD design for fixtures/tools, Knowledge of IATF/JEDEC standards, Product management experience

Technologies

SMT, SPI, AOI, Flip Chip bonding, Flux cleaning, VPS, FCCSP, FCBGA, SiP

Responsibilities

Select and introduce assembly equipment for advanced packages, Develop and improve materials and processes for SMT/SPI/AOI/bonding/cleaning, Support production line launch and volume transition, Improve process quality and yield

Seniority

Senior, hands-on IC