ASIC Digital Lead - ATPG & Methodology (f/m/div.)
Core
Technical lead for digital ASIC design scope, ensuring high-quality implementation from specification to integration and driving DFT/ATPG strategies.
Role type
Senior IC ASIC Digital Lead (ATPG & Methodology)
Builds
Complex digital ASICs for modern mobility systems
Domain
Semiconductor / Automotive Electronics
Deliverable
production ML models | product features
Required skills
Digital ASIC design, top-level integration, ATPG & test methodologies, coverage analysis, failure analysis, digital verification, interface validation, scripting (Python/Tcl/shell), cross-functional coordination
Preferred skills
German language proficiency
Technologies
ATPG tools, Python, Tcl, Shell
Responsibilities
Coordinate digital design scope across specification, development, and integration; ensure DFT and ATPG aspects are integrated to meet coverage targets; manage ATPG flow stability and continuous improvement; analyze test patterns and silicon data to identify root causes; develop automation solutions for test quality and efficiency.
Seniority
Senior, hands-on IC
