Staff Mixed Signal Verification Engineer
Core
Lead chip-level verification and behavioral modeling of mixed-signal power management devices (PMICs, battery chargers, switching regulators) using AMS/DMS methodologies.
Role type
Staff Mixed-Signal Verification Engineer
Builds
Complex mixed-signal power chips
Domain
Semiconductor / Power Management ICs
Deliverable
production ML models | product features
Required skills
Mixed-signal verification, AMS/DMS simulation, Behavioral modeling (SystemVerilog RNM, Verilog-AMS), UVM, Cadence Xcelium, Spectre, Debugging analog-digital interfaces, Verification plan development, Design review
Preferred skills
Experience with switching regulators, battery chargers, PMICs, Silicon validation, Customer interaction
Technologies
SystemVerilog, Verilog-AMS, UVM, Cadence Xcelium, Spectre
Responsibilities
Lead chip-level verification of analog and mixed-signal circuits, Create and validate behavioral models, Develop verification plans, Debug mixed-signal verification issues, Partner with designers to improve modeling accuracy, Participate in design reviews, Document verification metrics, Interface with external customers
Seniority
Staff, technical leadership & cross-functional collaboration
