System Validation engineer (系统验证工程师)
Core
Component-level validation, system debug, and customer issue resolution for DDR memory buffer products.
Role type
Senior IC validation engineer (memory subsystems)
Builds
DDR memory buffer products for mass production
Domain
Semiconductor / Memory / High-speed interfaces
Required skills
DDR memory subsystems, SerDes, PCIe, RCD, DRAM, DIMM, high-speed interface, system-level debug, component-level validation, lab equipment (oscilloscopes, logic analyzers, protocol analyzers), root cause analysis, test plan development
Preferred skills
x86 systems, platform-level bring-up/debug, cross-functional collaboration
Technologies
DDR, SerDes, PCIe, RCD, DRAM, DIMM, oscilloscopes, logic analyzers, protocol analyzers
Responsibilities
Debug issues on internal and customer systems, develop validation test plans and test cases, analyze electrical/functional/timing behavior, lead component-level validation and characterization, support product readiness for mass production
Seniority
Senior, hands-on IC
