Senior Staff Design Verification Engineer
Core
Provide technical leadership for verification of leading-edge memory interface products (DDR6, data buffers) for data center, AI, and cloud computing applications.
Role type
Senior Staff IC Design Verification Engineer
Builds
Advanced memory data buffer products
Domain
Semiconductor / Memory Interfaces
Required skills
SystemVerilog, UVM, verification strategy definition, functional coverage, debugging, testbench development, technical leadership, mentorship
Preferred skills
DDR4/DDR5 experience, high-speed memory interfaces, cross-block verification leadership
Technologies
SystemVerilog, UVM, DDR6, DDR4, DDR5 (via careerplan.io/jobs/744000152990979-senior-staff-design-verification-engineer-at-renesas-electronics)
Responsibilities
Define and drive verification strategies and methodologies; Lead development of SystemVerilog/UVM environments; Drive verification execution and coverage closure; Mentor verification engineers; Analyze complex design issues and drive solutions; Participate in architecture and design reviews.
Seniority
Senior Staff, hands-on IC with technical leadership
