Staff Verification Engineer
Core
Verification and modeling of mixed-signal Automotive power management devices, including PMICs, switching regulators, and related analog IP.
Role type
Staff IC mixed-signal verification engineer
Builds
Complex mixed-signal power chips for automotive applications
Domain
Automotive semiconductor / Mixed-signal analog and digital design
Deliverable
production ML models | product features
Required skills
Mixed-signal verification, Real Number Model (RNM) architecture, AMS model integration, ISO 26262 compliance, AEC-Q200 compliance, Gate-Level Simulation (GLS) optimization, RTL simulation, PVT corner analysis, analog/digital domain debugging, verification infrastructure development
Preferred skills
AI-based verification solutions, emerging verification technologies
Technologies
Real Number Model (RNM), AMS, Gate-Level Simulation (GLS), RTL, ATE, PVT corners
Responsibilities
Design and architect mixed-signal verification environments; Develop and implement comprehensive verification plans and strategies; Lead debugging activities for complex analog blocks; Set up and optimize Gate-Level Simulation (GLS) flows; Conduct in-depth RTL and Gate-Level simulations; Collaborate with cross-functional teams (Design, Application Engineering, ATE, Silicon Validation); Troubleshoot and debug complex design issues involving analog and digital domains; Drive continuous improvement of verification tools, methodologies, and infrastructure; Create and maintain comprehensive verification documentation, test plans, and coverage metrics
Seniority
Staff, hands-on IC with strategic oversight
