Staff Verification Engineer
Core
Creating top-level and block-level verification test plans for power-management integrated circuits to ensure full coverage of hardware and software components.
Role type
Staff IC verification engineer (power management)
Builds
Pre-silicon performance verification for power-management integrated circuits
Domain
Semiconductor / Power Management ICs
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, UVM, Assertion-Based Verification (PSL/SVA), formal methodology for functional coverage, EDA tools, scripting (TCL/CSH/Python), analog and mixed-signal IC architecture understanding, complex design debugging
Preferred skills
co-verification, Jama, Jira, multiphase switching regulators
Technologies
SystemVerilog, UVM, PSL, SVA, TCL, CSH, Python, EDA tools
Responsibilities
Create top-level and block-level verification test plans based on specifications; Drive quality to achieve maximum code and functional coverage targets; Analyze and debug failures, identifying root causes and proposing corrective actions; Lead projects from planning through mass-production delivery with a focus on pre-silicon performance; Promote innovation in verification methodologies and technologies
Seniority
Staff, hands-on IC
