Senior AMS Verification Engineer – Espoo
Core
Developing mixed signal ICs for consumer market space from concept to implementation, ensuring design integrity through comprehensive simulations at transistor, model, and top levels.
Role type
Senior AMS Verification Engineer
Builds
Mixed signal ICs and analog IP for consumer applications
Domain
Semiconductor / Mixed-Signal IC Design
Deliverable
production ML models | product features
Required skills
Analog circuit design, Mixed-signal verification flows, Hardware description languages (Verilog-A, Verilog-AMS, SystemVerilog), Transistor-level understanding, Block and top-level concepts, System level understanding
Preferred skills
Experience ramping up top-level AMS/DMS verification environments, Building top-level schematics
Technologies
Verilog-A, Verilog-AMS, SystemVerilog
Responsibilities
Develop leading edge analog IP, Execute comprehensive simulations at different abstraction levels, Collaborate with analog, digital, software, layout, verification, and test teams, Operate in different design/verification roles as needed
Seniority
Senior, hands-on IC