Principal Analog Design Engineer
Core
Architect, design, and verify CMOS analog blocks (Tx, Rx, PLL, high-precision circuits) and DDR I/O interfaces for custom ASICs, focusing on low power, signal integrity, and performance optimization.
Role type
Principal Analog Design Engineer (ASIC/SoC)
Builds
Custom ASICs for Automotive, Industrial, Infrastructure, and IoT applications
Domain
Semiconductor / Analog IC Design
Deliverable
production ML models | product features
Required skills
CMOS analog block design, high-speed DDR I/O interface design (DDR5/DDR6), analog Rx/Tx design, signal integrity analysis, circuit reliability (EM/IR/Aging), analog layout, design verification, technical mentorship
Preferred skills
Low power circuit design, innovative solution implementation
Technologies
Cadence Virtuoso, Maestro, Spectre, HSPICE, MATLAB, Excel
Responsibilities
Develop and optimize high-speed DDR I/O interfaces; analyze Si ATE/Bench data to extract actionable information; conduct comprehensive simulations and testing; create detailed design documentation including schematics and reports; provide technical guidance and mentorship to junior engineers; ensure designs meet EM/IR/Aging requirements; ensure layouts meet high analog standards for matching and performance.
Seniority
Principal, hands-on IC design with technical leadership
