HPC SoC Timing Design Engineer/Leader
Core
Developing large-scale complex SoCs for automotive applications using advanced 3nm process nodes, focusing on timing design technology and product development.
Role type
Senior IC HPC SoC Timing Design Engineer/Leader
Builds
High-performance automotive SoCs for CASE (Connected, Automated, Shared, Electric) applications
Domain
Semiconductor / Automotive / Digital Backend Design
Deliverable
production ML models | product features | infrastructure
Required skills
Static Timing Analysis, Timing Constraint design, Logic Synthesis, EDA tool usage, Timing Constraint debugging, Leadership, Big-picture thinking, Problem-solving
Preferred skills
Hardware language (Verilog-HDL), Business English usage
Technologies
EDA vendor tools, Renesas tools
Responsibilities
Perform Static Timing Analysis, Design Timing Constraints, Execute Logic Synthesis, Collaborate with overseas design centers (Vietnam, India), Lead product development and improve development flow
Seniority
Senior, hands-on IC with leadership responsibilities
