Principal Digital Verification Engineer
Core
Verification of DDR5 Data Buffer to meet functional and performance specifications for memory interface products.
Role type
Principal Digital Verification Engineer
Builds
Digital sections of leading-edge memory data buffer chips for DDR5, DDR6 and beyond
Domain
Semiconductor / Memory Interface / Datacenter AI & Cloud Computing (via careerplan.io/jobs/744000118441635-principal-digital-verification-engineer-at-renesas-electronics)
Deliverable
production ML models | product features
Required skills
UVM methodology, verification planning, coverage analysis, testbench development, state-of-the-art verification environments, optimization for reusability and performance, technical mentoring
Preferred skills
feasibility studies, feature extraction, checker development, process improvement
Technologies
UVM, DDR5, DDR6
Responsibilities
Define verification strategy, develop test plans and coverage, execute tests, provide technical guidance and mentoring to verification engineers, drive improvements to verification process, monitor design verification coverage, work with design team to ensure requirements are met
Seniority
Principal, hands-on IC with mentorship
