Senior Power Integrity Engineer
Core
Define, analyze, simulate, and validate power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs and AI-scale systems.
Role type
Senior IC Power Integrity Engineer
Builds
High-performance networking hardware platforms (ASICs, SerDes, optical modules)
Domain
Networking hardware / Electrical Engineering
Required skills
Power delivery network (PDN) design, target impedance analysis, PI simulation (Cadence Sigrity, Ansys SIwave/HFSS), high-layer-count PCB design, multi-phase voltage regulator architecture, lab validation and correlation, SI/PI co-optimization
Preferred skills
High-performance networking ASICs, 112G/224G/448G PAM4 SerDes, 400G to 1.6T Ethernet, package-level PI, co-packaged optics, thermal/mechanical effects on PDN, EMI/EMC in high-density systems
Technologies
Cadence Sigrity PowerSI/OptimizePI, Ansys SIwave, Ansys HFSS, PowerDC, oscilloscopes, VNAs, power analyzers (via careerplan.io/jobs/72-006-4C-270-senior-power-integrity-engineer)
Responsibilities
Lead PI activities from architecture through production; Define and optimize board/package-level PDNs; Perform pre/post-layout PI simulations; Establish and validate target impedance requirements; Analyze DC voltage drop, AC impedance, and transient response; Collaborate with PCB layout engineers on stackups and decoupling; Work with SI engineers for co-optimization; Develop PI design guidelines; Support schematic/layout reviews and sign-off; Perform lab measurements and correlation; Investigate and resolve PI issues during bring-up and production.
Seniority
Senior, hands-on IC
