Senior Verification Engineer - Media IP
Core
Own and drive verification for a Display Processor (DPU) subsystem comprising multiple units, from early planning through sign-off, ensuring successful integration into complete systems.
Role type
Senior IC verification engineer (DPU subsystem)
Builds
Reusable, scalable, high-performance SystemVerilog/UVM environments and verification IP for DPU subsystems
Domain
Semiconductor IP (Display Processors) for automotive, IoT, and client markets
Required skills
SystemVerilog, UVM, AMBA APB/AXI protocols, verification planning, testbench development, Python/C programming, regression automation
Preferred skills
Power-aware verification, formal verification, performance analysis, C reference models
Technologies
SystemVerilog, UVM, Python, C, AMBA APB, AMBA AXI
Responsibilities
Architect verification environments, define verification plans and coverage models, lead resolution of complex failures, align verification activities across teams, drive improvements in verification methodology and automation
Seniority
Senior, hands-on IC