Senior Staff Engineer Design Verification
Core
Lead end-to-end verification strategies and full chip verification for Automotive Ethernet PHY and switch chips, ensuring functional safety and cybersecurity compliance.
Role type
Senior Staff IC Design Verification Engineer
Builds
Automotive Ethernet PHY and switch chips
Domain
Automotive semiconductors / Hardware verification
Required skills
UVM, SystemVerilog, Verilog, C/C++, Ethernet protocol knowledge (PHY/MAC/Switch), mixed-signal co-simulation, formal verification, root-cause analysis, verification strategy definition
Preferred skills
AI tool usage for verification, mentoring junior engineers, cross-functional collaboration with RTL/FPGA/emulation teams
Technologies
UVM, SystemVerilog, Verilog, C/C++, Spice, Ethernet
Responsibilities
Define and execute end-to-end verification strategies and test plans; Build verification infrastructure bridging digital RTL with analog/mixed-signal models; Lead root-cause analysis for complex simulation failures; Mentor junior team members on testbench design and debug best practices; Engage in development of new verification methodologies for functional safety certification.
Seniority
Senior Staff, hands-on IC with mentorship
