IO/Analog Layout Engineer
Core
Develop advanced parallel standard IO layouts (I2C, SPI, GPIO) and floor plans for differentiated sub-micron technology.
Role type
IO/Analog Layout Engineer
Builds
IO/analog blocks and floor plans for semiconductor chips
Domain
Semiconductor / Analog & Mixed-Signal IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
IO layout design, Analog layout design, Floor planning, EDA tools (Virtoso/OA, Calibre, StarRC/QRC), Design Rule Manual knowledge, IO/Analog fundamentals (ESD, Matching, EM, IR Drop, Latch-up, coupling, cross-talk), Electrical schematic interpretation
Preferred skills
SLIMBUS, LVDS, USB2.0 design experience
Technologies
Virtuoso/OA, Calibre, StarRC/QRC
Responsibilities
Develop layouts for IO suitable for required specifications and customer needs, Perform floor planning activity, Analyze link between layout and electrical performances/manufacturability
Seniority
Junior to Mid-level, hands-on IC
