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Assembly Design Kit (ADK) Engineer

San Jose, CA💼 Full-time💰 $105,000–$105,000🗓 2026-10-02 → 2026-10-03

Core

Lead the development of robust design rules and verification flows for next-generation 2.5D/3D Interposer and Heterogeneous Integration technologies.

Role type

Senior IC ADK Engineer (Advanced Packaging)

Builds

Assembly Design Kits (ADK) for 2.5D/3D IC, SiP, and Fan-Out technologies

Domain

Semiconductor Advanced Packaging

Required skills

Physical Verification (PV), Design Rule Check (DRC), Layout vs. Schematic (LVS), TSV, Micro-bump, bridge die, RDL, GDSII/OASIS data formats, EDA tool integration

Preferred skills

Tcl, Perl, Python, SKILL scripting, manufacturing process knowledge (Reflow, Molding, Bonding, FEOL/BEOL), design flow strategy

Technologies

Synopsys (IC Validator, 3DICC), Cadence (PVS, Virtuoso, Integrity 3D-IC), Siemens EDA (Calibre)

Responsibilities

Lead creation and maintenance of comprehensive Assembly Design Kits (ADK) for advanced packaging; Define, debug, and validate Design Rules (DRC) and LVS checks; Partner with package design, process integration, and manufacturing teams; Provide expert support for physical verification issues; Develop and automate verification flows using advanced scripting; Analyze and optimize the end-to-end package design flow

Seniority

Senior, hands-on IC

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