Signal Integrity Engineer
Core
Designing high-speed interconnects, breakout structures, and validating signal/power integrity for AI platforms and ASIC packaging.
Role type
Senior IC Signal Integrity Engineer
Builds
High-performance AI computing platforms, ASIC packages, and PCB architectures
Domain
Semiconductor hardware, high-speed digital design, AI infrastructure
Deliverable
production ML models | product features
Required skills
High-speed digital design (10Gbps+), PCB/package design, SI/PI simulation and extraction, ECAD tools (Cadence Allegro), connector technologies (NPO, CPO), material trade-off analysis
Preferred skills
Experience with 100GbE, GDDR6, PCIe Gen5+, post-silicon bring-up, field failure analysis
Technologies
Cadence Allegro, NPO, CPO, PCIe Gen5+, 100GbE, GDDR6
Responsibilities
Design and simulate complex breakout structures; Perform SI/PI simulation and extraction of board models; Contribute to design sign-off with ASIC packaging and layout teams; Participate in design reviews; Support post-silicon bring-up and troubleshoot production failures
Seniority
Senior, hands-on IC
