Emulation Engineer, Automotive Robotics
Core
Building scalable, high-performance emulation platforms for chiplet-based AI/ML engines to enable silicon debug, design verification (DV), and performance analysis.
Role type
Senior IC emulation engineer (SoC/ASIC)
Builds
Multi-chiplet emulation ecosystems supporting DV, software development, and power/performance debug
Domain
Semiconductor hardware engineering, AI/ML accelerators, RISC-V, chiplet architecture
Deliverable
infrastructure
Required skills
SoC/ASIC design, logic design, verification, emulation platform architecture, Verilog/SystemVerilog, C/C++, SystemC, commercial emulator usage (ZeBu/Palladium/Veloce), testbench/transactor/monitor development, automation
Preferred skills
mentoring junior engineers, cross-functional collaboration with architecture/software/DV teams
Technologies
RISC-V, PCIe, UCIe, die-to-die links, memory controllers, ZeBu, Palladium, Veloce, SystemC
Responsibilities
Architect DV and emulation environments from transactors to debug hooks, develop testbenches and support systems, drive emulation coverage from functional to low-level software enablement, optimize platform for frequency and resource sharing
Seniority
Senior, hands-on IC
