ASIC Implementation Specialist
Core
Own blocks throughout the RTL-to-GDSII back-end flow to accelerate time-to-market for ASICs supporting trading systems.
Role type
Senior IC ASIC Implementation Engineer
Builds
ASIC chips for trading systems
Domain
Semiconductor hardware design (ASIC) for financial trading infrastructure
Deliverable
production ML models
Required skills
RTL-to-GDSII flow, floorplanning, clock-tree synthesis, STA, timing closure, physical verification, power integrity analysis, logic equivalence checking, ECOs, automation scripting, CMOS/RC-parasitic extraction, low-power design flow, DFT awareness, FinFET nodes (16/12/7/5)
Preferred skills
custom macro integration, package/PCB co-design, chiplet/2.5D/3D integration, ML-driven implementation flows, RTL coding, functional verification, synthesis
Technologies
Cadence, Siemens
Responsibilities
Design floorplans and power grids; drive STA and timing closure; ensure designs are ready for signoff; shape and improve implementation flows; collaborate with RTL, DFT, packaging, and foundry teams; conduct design reviews and documentation
Seniority
Senior, hands-on IC
