Verification Engineer
Core
Building silicon verification for high-speed AI inference chips to overcome memory wall constraints in data center applications.
Role type
Senior Silicon Verification Engineer (IC)
Builds
Production ML/AI IC products for scale-out data center applications
Domain
Semiconductor hardware / AI infrastructure
Deliverable
production ML models | infrastructure
Required skills
Python, C++, SystemVerilog, digital hardware concepts, RTL debugging, waveform debugging
Preferred skills
UVM, pre-silicon RTL verification, verification planning, testbench creation, stimulus creation, functional modelling, checker creation, coverage closure, Transaction-Level Modelling, SystemVerilog Assertions (SVA), Cocotb, Verilator, Icarus Verilog, formal verification, monorepo workflows, Bazel
Technologies
SystemVerilog, Python, C++, Cocotb, Verilator, Icarus Verilog, Bazel, UVM, SystemC
Responsibilities
Collaborate with modelling, system architecture, and RTL design teams to ensure functional quality; contribute to specification and architecture discussions; improve verification workflows to increase tape-out quality and reduce costs; drive rapid iteration from idea to hardware.
Seniority
Mid-level (3+ years), hands-on IC
