Verification Engineer
Core
Verify functionality and performance of digital IP and SoC logic at the chiplet integration level for high-performance AI platforms.
Role type
Senior IC verification engineer (SoC/chiplet)
Builds
High-performance RISC-V CPU and System-in-package (SiP) AI platforms
Domain
Semiconductor hardware design, AI computing, RISC-V architecture
Deliverable
production ML models | product features
Required skills
SoC verification, verification flows, scripting and automation, logic design, Verilog/SystemVerilog
Preferred skills
RISC-V architecture, die-to-die interfaces, memory controllers, PCIe, UCIe, low-level drivers in C
Technologies
Verilog, SystemVerilog, RISC-V, PCIe, UCIe
Responsibilities
Verify digital IP and SoC logic at chiplet integration level; Build and improve verification infrastructure including model builds and simulation/regression runs; Create verification components like testbenches, checkers and test generators; Add assertions and coverages along associated methodologies; Build verification test plans for subsystems and summarize results; Publish and review verification metrics and drive convergence towards tape-out; Guide and mentor junior engineers.
Seniority
Senior, hands-on IC with mentorship
